MISC

Basic information

Name Sato Yoichiro
Belonging department
Occupation name
researchmap researcher code 1000035611
researchmap agency Okayama University of Science

Title 

A Case Study of Symbolic Model Checking for Verilog-HDL Hardware Design

					

					

						

							

								

									
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Author 

									
								

							

						

						
横川智教
東山大地
近藤真史
佐藤洋一郎
有本和民

					

					

						

							

								

									
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電子情報通信学会技術研究報告

					

					

						

							

								

									
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113

					

					

						

							

								

									
Number Of Pages 

									
								

							

						

						
454(VLD2013 134-167)

					

					

						

							

								

									
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2014

					

					

						

							

								

									
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