Investigating the Role of D Flip-Flop as a Synchronization Circuit for Enhancing Randomness and Stabilizing Bit Distribution in Ro-Based Rng on Fpga

Mitsuki Fujiwara, Ryoichi Sato, Samsul Huda, Yasuyuki Nogami, Yuta Kodera

Random number generators (RNGs) are crucial in applications requiring unpredictable sequences, including cryptography, simulations, and gaming. Among the different types of RNGs, ring oscillator (RO)-based RNGs have gained popularity due to their simplicity, and suitability for FPGA implementation. Previous research by Wold et al. has suggested that connecting directly a D flip-flop (D-FF) to the RO circuit enhances randomness. However, the precise factors contributing to the improved randomness through the connection of the D-FF remain unclear. Then, we hypothesize that the D-FF acts as a synchronization circuit, enhances randomness. To verify this hypothesis, we design and implement RO-based RNG circuits with and without a D-FF directly connected to the RO circuit on an FPGA platform. By analyzing and comparing the bit distribution of the generated number sequences, we investigate the impact of the D-FF on the stability of the generated numbers. The results confirm that incorporating a D-FF into the RO-based RNG circuit stabilizes the random number sequence, leading to the conclusion that the D-FF plays a synchronization role in these circuits.

2024 International Symposium on Information Theory and Its Applications (ISITA)

IEEE

244

249

10.23919/isita60732.2024.10858237

https://doi.org/10.23919/isita60732.2024.10858237