In recent years, The demand for physical random numbers is increasing. There are services that fully use physical random numbers, such as PUF (Physical Unclonable Function) and EaaS (Entropy as a Service), and so on. The unpredictability, acyclicity, and non-reproducibility of physical random numbers are indispensable in modern IT. However, the entropy sources from which physical random numbers are derived are often unstable, and it is complicated to generate random numbers without value bias or characteristics. Although various entropy sources have been proposed, this research uses an RO (Ring Oscillator), which can be configured in a logic circuit, to generate random numbers using an unstable oscillation period as the entropy source. Sunar, Wold, et al., and many other researchers have focused on this approach. The authors focus on the circuit proposed by Wold et al, the goal is to improve the randomness and reduce the size of the circuit. However, the factors affecting randomness are numerous and complex, and they have not yet been organized. Therefore, the authors investigated the effect on randomness by focusing on each element in the circuit proposed by Wold et al. In the previous research, the characteristics of the XOR gates and the number of ROs used in the circuit of Wold et al. and their relationship to randomness have been confirmed. It was found that using an XOR gate increased the complexity of the output random numbers. The authors also found that increasing ROs improved the results of the bit distribution test of random numbers and the 2-bit Markov process test. However, the authors also found that only increasing ROs did not completely improve the test results. In this research, the authors focuses on the D-FF (Delayed Flip-flop) used in the Wold et al. circuit, which is used to connect ROs and the circuit after the XOR gate. Based on the fact that ROs and FPGA internal clock are asynchronous, the authors suppose that it is effective to use D-FF for putting a more stable value into the XOR gate. Therefore, the relationship between the size of synchronous circuit and randomness have been investigated. More specifically, the authors confirmes whether the characteristics of the output random number sequence change when multiple D-FFs are connected. As a conclusion, the authors find that increasing the number of D-FFs improves the bit distribution of the output random numbers. In the future research, additional investigation on the number of D-FFs and randomness will be conducted, and the circuit will be improved together with the randomness.
